``Moving still farther from the ASIC-based concept, we have the concept of “density optimization” where reconfigurability allows a lower-density device to do the work of a higher-density one by swapping in different bitstreams at different times. Typically this is useful in devices with modal functionality, where only a single mode is active at any given time, and the device can be reconfigured for the current operating mode.

The benefit of density optimization is usually strictly economic. You’re getting several FPGAs for the price of one, or a larger effective FPGA for the price of a smaller one. The only requirement is that your design must have some modal nature that can tolerate a few milliseconds of reconfiguration time, and your I/Os need to be easily shared or multiplexed between modes.``

Come on e.Digital.....show um what you can do with these puppies....

doni