I have been reading and re-reading the information we have available on the thyristor issue.

Once again we are faced with the need for translation when it comes to how Suresh uses words to convey a concept or position.

The more I listen, the more a "chicken or the egg" scenario is presented.

On the one hand, there are the management comments about the ability to produce the thyristor itself. There is ample information out there that says ,in essence, the bistable switching of a thyristor is not compatable with a 4th position. This speaks to the imcompatability of the stacking structure of the switch to the epitaxial structure of the chip.

On the other hand, at another juncture, Suresh talks about the inability to "get power to" the 4th position, as if they have the switch stack sorted out but can't energize that 4th position using the same engineering flow through that has made the optimization of the sensor, vscel and transistor possible on that similar epitaxial stack.

It would be very helpful to have more precise information to work with from the company, but that is not likely to be forthcoming. What we do know is that overcoming this problem is finacially beyond the capability of PoET's present bank account balance.

Just some thoughts on a Saturday.