Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Re: Further node reductions
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Aug 29, 2014 11:27AM
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Aug 29, 2014 11:31AM

Fairchij, thanks for the response. Actually to clarify, my question was more around whether anyone at the AGM questioned why they aren't choosing to milk the market more by starting off at 100nm, and reducing in time to incrementally improve performance just like what happened with silicon with small increments in reduction every few years. The reductions could be much quicker with POET (6-12 months vs. every 2-3 yrs or so because the technology is there to do it) but it is my understanding we already have incredible speed/power and incredible energy efficiency gains at 100nm already, so why not start building devices on chips at 100nm to get products out to market and then in 6-12 months start offering at 40nm for example?

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Aug 29, 2014 11:46AM
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Aug 29, 2014 12:01PM
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Aug 29, 2014 02:00PM
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Aug 29, 2014 02:19PM
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Aug 29, 2014 02:22PM
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