"In short, where NOR flash required simply a wear-leveling algorithm, modern NAND flash requires a full device-management algorithm. The basic premises of any NAND device-management algorithm are three pieces: data decorrelation (sometimes referred to as entropy distribution), error correction, and finally, wear-leveling. Oftentimes, the device management algorithms are built into controllers that emulate a simpler (block-like) interface; the http://www.siliconmotion.com/download.php?t=U0wyRnpjMlYwY3k4eU1ERXhMekF5THpBNEwzQnliMlIxWTNRMU1ETXpOVFU0TWpVMUxuQmtaajA5UFZOTk1qWTRNMFZPSUZCeWIyUjFZM1FnUW5KcFpXWT1D">Silicon Motion SM2683EN that was in my damaged card is marketed as a “all-in-one” SD-to-NAND controller."

My previous comments on that matter:

Other considerations found in "OBJECTS AND SUMMARY OF THE INVENTION " as equally important:

"Also disclosed is a method for recording a new message without disturbing the physical continuity of existing messages and without manually searching for a blank segment of memory on the recording medium which includes the steps of"

The underlined condition is a direct result of what happens under the hood as well...

For others utilizing standard methods of flash management(the under the hood stuff)....they can not make that statement...as they do those things.

e.Digital treat both memory types in the same fashion...

link

doni