"Core segmentation just links memory together in smaller groups for faster access time and will use multiple pipelines to send data."

Its a timing sequence....the pipeline is nothing more than this technique..

 "(2) Pipelined operation in RAS circuitry: the DRAM core automatically goes into a reset state after sense/restore operation. After sending data to the output stage, the next row or word line can be driven without any time lag, while the previous data is in the output stage.,"

There are not "multiple pipelines to send data"

doni