09/22/2006

SUNNYVALE, Calif. — Future-generation flash memory devices will benefit from drive architectures that improve performance and data security while improving systems integration, in advances shown at several storage media conferences.

The conferences included MemCon hosted by Denali Software Inc., (Palo Alto, Calif.); Diskcon hosted by IDEMA (International Disk Drive Equipment and Materials Association) of Sunnyvale, Calif., and a Non-Volatile Memory Conference hosted by Web-Feet Research Inc, (Monterey, Calif.).

Storage solutions such as the hybrid disk drive and the ReadyBoost and ReadyDrive features Microsoft is incorporating in its forthcoming Windows Vista operating system took center stage, along with the alternative Robson technology proposed by Intel Corp. The solutions all bank on availability of low-cost, high-density NAND-flash memory.

However, as flash memory makers push process technologies to features as small as 40 nm to achieve chip densities of up to 32 Gbits, performance and architecture-related issues arise.

For example, although outwardly similar, NAND flash memories of equivalent capacity often deploy different internal control architectures. The external management of memory chips thus depends on a control chip optimized for a specific-generation memory — making it harder to system manufacturers to switch vendors to achieve optimal cost savings.

To allow handle chips from multiple vendors, the memory controller would have to be flexible enough to adjust its control interface. That places a lot of overhead in the controller chip's design and can limit the controller's ability to handle future NAND memories.

As an alternative, Intel, in conjunction with Micron Inc. has proposed an open NAND flash interface (ONFI) referred to as managed NAND. Samsung has developed its own scheme dubbed MoviNAND, combining a multimedia memory card controller and NAND memory in a single package.

In these schemes, the memory controller is incorporated onto or alongside the NAND memory chip, thus providing a more-standard interface to the host system.

Many hand-held entertainment devices and latest smart phones, now boost significantly higher amounts of storage, noted IdaRose Sylvester, a senior research analyst for consumer semiconductors at market research company IDC. She expects on-board NAND demand and flash memory card demand in cell phones to see the largest growth.

Growing storage needs will dictate greater protection against unauthorized data intrusion. John Rudelic, a principal engineer in the Flash Memory Group of Intel, said flash memories are subject to hacker threats, with protection schemes external to the flash memory also subject to hacking.

Standard block locking in NOR flash offers inadequate protection, and even moving the critical code to a chipset system-on-a-chip or a boot ROM limits protection to only the initialization sequence, leaving the remaining data vulnerable.

At Memcon, Intel unveiled authenticated flash memory architecture, implemented in NOR flash, which integrates a FIPS-compliant random-number generator and SHA-1 and RSA macros internal to the flash memory. By using an authentication sequence, the memory needs a valid signature before performing any operation.

This scheme prevents unintended flash modification and protects the entire flash memory with hardware independent of the CPU host, stated Rudelic. Samples of authenticated-operation flash memory are available now, with Intel working to develop an alternate source.

In many cell phones, both NOR and NAND flash coexist with NOR flash hosting the operating system and application software and the NAND flash holding the audio, video, still-image data. However as system performance requirements increase, the standard address/memory bus interface on NOR flash devices runs out of steam.

To boost performance, STMicroelectronics proposed a double-data-rate memory interface to double the transfer rate. Bolstering memory performance will require the memory to be internally pipelined, but the interface will lead to system-level simplification and lower pin count.

Sure are lots of interesting things under consideration...only to hit the skids in 3 or 4 years.

Not gona happen.....

doni