United States Patent 7,960,718 Fink, et al., June 14, 2011

Abstract
Fabrication of thin-film transistor devices on polymer substrate films that is low-temperature and fully compatible with polymer substrate materials. The process produces micron-sized gate length structures that can be fabricated using inkjet and other standard printing techniques. The process is based on microcrack technology developed for surface conduction emitter configurations for field emission devices.

Inventors: Fink; Richard Lee (Austin, TX), Yaniv; Zvi (Austin, TX)
Assignee: Applied Nanotech Holdings, Inc. (Austin, TX)
Appl. No.: 11/772,711
Filed: July 2, 2007
Related U.S. Patent Documents
Application Number Filing Date Patent Number Issue Date
60819574 Jul., 2006

The invention claimed is:

1. A thin film transistor (TFT) comprising: a substrate; a source electrode on the substrate; a drain electrode on the substrate positioned a distance from the source electrode; a layer of metal positioned on the substrate between the source and drain electrodes, wherein the layer of metal includes a microcrack formed in the metal layer between the source and drain electrodes, wherein the microcrack separates a first portion of the metal layer contacting the source electrode from a second portion of the metal layer contacting the drain electrode, wherein the metal layer has a physical configuration having a measurable roughness and oxygen level indicating that the metal layer was formed from a reduction of a metal oxide; an active semiconductor material deposited so that it bridges the microcrack, contacting both the first and second portions of the metal layer; a gate dielectric material deposited over the active semiconductor material; and a gate electrode deposited on the gate dielectric material and not contacting the metal layer or the active semiconductor material.

2. The TFT as recited in claim 1, further comprising a layer of carbon positioned between opposing faces of the microcrack.

3. The TFT as recited in claim 1, wherein the active semiconductor material comprises carbon nanotubes.

4. The TFT as recited in claim 1, wherein the active semiconductor material comprises semiconducting nanowires.

5. The TFT as recited in claim 1, wherein the active semiconductor material comprises organic semiconductors.

6. The TFT as recited in claim 1, wherein the substrate comprises a plastic.

7. The TFT as recited in claim 1, wherein the metal oxide is PdO.

8. The TFT as recited in claim 7, wherein the metal layer is Pd.

9. The TFT as recited in claim 1, wherein the microcrack has a width of less than or equal to 0.1 microns.

10. The TFT as recited in claim 1, wherein the active semiconductor material is in a form of a thin film.

11. A thin film transistor (TFT) comprising: a plastic substrate; a source electrode on the plastic substrate; a drain electrode on the plastic substrate positioned a distance from the source electrode; a layer of metal oxide deposited on the plastic substrate between the source and drain electrodes, wherein the layer of metal oxide is reduced to metal to form a microcrack in the layer between the source and drain electrodes, wherein the microcrack separates a first portion of the metal layer contacting the source electrode from a second portion of the metal layer contacting the drain electrode, wherein the metal layer has a physical configuration having a measurable roughness and oxygen level indicating that the metal layer was formed from a reduction of the metal oxide; an active semiconductor material deposited so that it bridges the microcrack, contacting both the first and second portions of the metal layer; a gate dielectric material deposited over the active semiconductor material; and a gate electrode deposited on the gate dielectric material and not contacting the metal layer or the active semiconductor material.


BACKGROUND

Most commercially available flat panel displays are currently made on glass substrates. Glass substrates offer many advantages in manufacturing displays since they are compatible with many process technologies. From a user perspective, glass substrates have many disadvantages: they are heavy, rigid, prone to breakage from mechanical shock, and difficult to conform to forms that are not flat. By using flexible substrates instead of sheet glass, these issues are significantly reduced or eliminated completely. For this reason, flexible displays and electronics (RFID tags, etc.) are highly desired for military applications where user environments are harsh and reducing power and weight and improving ruggedness are desired characteristics.

There is a large commercial industry already established based on liquid crystal display (LCD) technology. This display architecture is not desirable for portable military applications; LCDs generally require a backlight, and the use of color filters to generate color significantly reduces the power efficiency. Standard cold-cathode fluorescent lamp (CCFL) edge light backlight technology is counter to the flexible display concept, although new LED edge lighting may improve the situation. Flexible reflective or emissive displays such as organic LED (OLED) technologies are preferred. Unfortunately, even these display technologies require an active circuit backplane in order to achieve the necessary uniformity, lifetime, brightness and efficiency.


DETAILED DESCRIPTION

The present invention addresses the foregoing needs with an approach to fabricating TFT devices on polymer substrate, films that is low-temperature and fully compatible with polymer substrate materials. This approach also allows micron-size gate length structures than can be fabricated using inkjet and other standard printing techniques. The approach is based on the microcrack technology developed by Canon in its effort to make Surface Conduction Emitter (SCE) displays (K, Yamamoto et al., "Fabrication and Characterization of SCE Emitters," SID 05 Digest, p. 1933; and T. Oguchi et al., "A 36-inch Surface-Conduction Electron-Emitter Display (SED)," SID 05 Digest, p. 1929). In this process, Canon demonstrated that it could make large arrays of micron-sized cracks in structures that are fabricated using printing techniques. The microcracks are formed by reducing a PdQ layer to Pd metal. During this process, local stresses in the layer force cracks across the layer. The present invention uses these microcracks as the gap between source and drain electrodes. The process is modified to introduce a gate electrode to the structure. Any one of the low-temperature semiconductor approaches described earlier (carbon nanotubes, semiconducting nanowires or organic semiconductors) may be used as the active semiconducting layer in this self-formed microcrack TFT approach since they can be deposited at low temperature using printing or solution-based techniques. A description of this approach follows.

Description of Canon SCE Microcrack Process Compared to TFT Process of the Present Invention

Canon developed the Surface Conduction Emitter (SCE) technology for a field emission display application. Most field emission structures are vertical, with cathode, gate, focus and anode electrodes in a linear stack. The Canon SCE approach changes the cathode and gate structure from vertical to a horizontal structure, formed on a glass substrate. FIG. 1 illustrates the configuration for field emission applications. The microcrack is located between the two electrodes shown in FIG. 1 above the letters SCE. Free electrons generated at the microcrack are accelerated to the anode.

In this field emission approach, a microcrack is formed between two electrodes. When sufficient voltage is applied between the two electrodes on either side of the crack, electrons are extracted from one side and attracted to the other side of the gap. Most of the electrons that jump across the crack are absorbed by the other electrode, but some (about 3%) escape and are accelerated to the anode which has a 10 kV potential applied to it. The anode is coated with phosphor material, such that when the electrons strike the phosphor, light is emitted.

The present invention uses the microcrack structure used as a field emission device in SCE as part of a TFT structure for emissive OLED or other display technologies on polymer substrates. The microcrack that is formed (described below) is less than a micron wide. It will form the channel between source and drain of the TFT. FIGS. 2A and 2B illustrate the similarities and differences between the structure used for field emission and a similar structure used for TFT applications.

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