That was a very good article nogrod posted. POET has the solution for efficient coupling without the need for active alignment. Recall that reducing coupling losses was one of the first aspects Suresh highlighted which sets the POET platform apart from the crowd.

If we look at the numbers quoted in the VLSI submission in June 2022 we see that POET achieves best in class coupling efficiencies at wafer scale and the testing and burn in is done at wafer scale.

VLSI Paper - Hybrid Integration 20220207 (poet-technologies.com)

POET's send and receive circuits are connected with a loopback waveguide allowing for testing on the wafer. And those numbers are going to get even better by applying Vanguard's facet-attached-microlenses at wafer scale.

Clearly the versatility of this platform to provide a very large range of applications is something that industry requires as the need for speed, energy efficiency and cost savings in a plugable continues to climb as the role of AI and ML become essential to today's digital world.