Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Patent Applications

A couple more applications published this week, not the seminal 800G work we know is in the works, but further fine tuning of the existing OI patent portfolio.

 

Office

United States of America

 

Application Number

17228046

Application Date

12.04.2021

Publication Number

20210255396

Publication Date

19.08.2021

 

Applicants

POET Technologies, Inc.

Inventors

Suresh Venkatesan

Miroslaw Florjanczyk

Trevor Hall

Peng Liu

Jing Yang

 

Title

(EN) Dual Core Waveguide

 

Abstract

(EN)

The invention described herein pertains to the structure and formation of dual core waveguide structures and to the formation of optical devices including spot size converters from these dual core waveguide structure for the receiving and routing of optical signals on substrates, interposers, and sub-mount assemblies.

 

https://patentscope.wipo.int/search/en/detail.jsf?docId=US333831376&tab=NATIONALBIBLIO&_cid=P11-KSLWVZ-21018-1

 

 

Refers to existing US patents

https://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=3&f=G&l=50&co1=AND&d=PTXT&s1=%22Poet+technologies%22.ASNM.&OS=AN/%22Poet+technologies%22&RS=AN/%22Poet+technologies%22

 

https://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=2&f=G&l=50&co1=AND&d=PTXT&s1=%22Poet+technologies%22.ASNM.&OS=AN/%22Poet+technologies%22&RS=AN/%22Poet+technologies%22

 

 

 

 

Office

United States of America

 

Application Number

17233864

Application Date

19.04.2021

Publication Number

20210255386

Publication Date

19.08.2021

 

 

Applicants

POET Technologies, Inc.

Inventors

William Ring

Miroslaw Florjanczyk

 

 

Title

(EN) OPTICAL DIELECTRIC WAVEGUIDE STRUCTURE

 

Abstract

(EN)

An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.


https://patentscope.wipo.int/search/en/detail.jsf?docId=US333831366&tab=NATIONALBIBLIO&_cid=P11-KSLWVZ-21018-1

 

 

Refers to existing US Patent

 

https://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=%22Poet+technologies%22.ASNM.&OS=AN/%22Poet+technologies%22&RS=AN/%22Poet+technologies%22

 

 

 

 

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