So to add a bite size piece of information to the puzzle of why it is taking industry so long to produce a commercially viable laser in silicon. The effort to insert III-V materials to provide the band gap required to generate light on a silicon substrate has significant barriers and industry has spent many years and invested a lot of money on the problem.

The root problem is lattice mismatch.

Silicon has a very low coefficient of thermal expansion (CTE) in relation to all other semiconductor materials.

The coefficient of thermal expansion for a material is usually specified over a temperature range because it varies depending on the temperature. The following values are given for a temperature around 20 °C. CTE is usually given in units of um/m/°C or ppm/°C.

So from the above table you can see that at room temperature InP will expand roughly twice as much as silicon. So  in order for InP material be deposited, bonded, implanted etc. to a silicon substrate the shear stress associated with the mismatch of expansion and contraction across the operating temperature range has to  be addressed. The shear stress at the points of contact between the materials will create dislocations (fractures) and plastic deformations (the materials will flow) at elevated temperatures and change shape. The expansion and contractions at different rates will cause permanent failure if they cannot be adequately managed. So buffering and shape modification is required in an effort to create multiple layers which can reduce these stresses. These counter measures in general act to reduce the effectiveness of the lasing process.

So consider that the largest production of heat generated in the system is the laser.

There are many other issues that are problematic and directly related to the efficiency of coupling the light and controlling the wavelength produced. And it does not take much deep think to realise that 5g applications where ambient conditions are not controlled in outdoor locations would add to the problem of application.

And just as a reminder the POET Optical  Interposer platform  dielectric layers have been perfected for both the lowest insertions losses in industry and the first waveguide filtering that meets CWDM standards in a CMOS fabrication process in very high volumes at low cost. And they have done it on shoestring budget over two years.

Winner winner chicken dinner.

Back to working on my current project.

Later.