Wake has posted an article from Semiconductor Engineering in the off-topic forum, but I think it is definitely on topic and worth to bring to your attention. Mark LaPedus explains what is going on in a fab, why it takes so long and takes even longer with smaller structures on the chip.
I think this is an important read for POET shareholders, because we have to understand that and why in a fab, you can't run a batch of wafers with your latest engineering and your latest epitaxial juice in just a couple of hours, check your results, and quickly run another modified batch.
Here's the link: Battling Fab Cycle Times