Re: Vikas Gupta on Linkedin about Poet NR.
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Apr 07, 2016 04:31PM
Packaging Engineer at POET Technologies
MCM Packaging, Silicon Photonics, Flip Chip technology, 2.5D package integration for silicon photonics, light coupling and laser subassembly.
Packaging IP evaluation and Package Technology analysis. Provide technical feedback to legal teams.
Managing multiple package development programs including wirebond, FC, waferlevel packaging. Quality and reliability evaluations. Explore customer requirements by working with business units and provide roadmaps. Work with overseas factory to meet customer TT$ and quality requirements. Manage Package qualifications,NPI, work with customer to resolve end customer issues.
(Open)1 recommendationRaj leverages his strong technical knowledge and experience in Semiconductor Packaging in providing customers with sound solutions. His attention to detail and follow up ensure critical details are not overlooked. Raj is a self starter and hits...View
Package development for CPU and chipset for mobile group. FC packages and wire bond packages for mobile products. Quality and reliability assurance for the packages both at first level and 2nd level. Work with OEMs and ODMs to solve package related issues. Drive board level reliability efforts with internal teams and OEMs.
Subcon management for molded wire bonded packages. Co develop thermal packages with subcon by working closely with business units. Quality and reliability assurance for the packages. Managed multiple subcons and multiple programs.
Optoelectronic package technology development, technology transfer. Program manager for Industry-Cornell University packaging alliance.
Low temperature solid state physics