It kind of gives you a quick overview of where they are at with SiP.

Lenghty article I must admit, but hey, it doesn't always have to be easy.

Some images may also helps you understand some specific terms.

I would read it if you want to know more about SiP and it would than helps to compare POET to it.

Happy enlightment

The abstracts that says it all (to me) :

"Silicon light sources are the main obstacle and a big challenge in silicon photonics integration circuits"

Also, the conclusion is quoted below :

7. Summary and future prospects

In this paper, we reviewed the recent advances in siliconbased passive and active optical interconnect components. Recent progress and our research results on a silicon light source, grating coupler, optical modulator, Ge photodetector and silicon OEICs are provided. Monolithic and hybrid silicon OEICs are demonstrated with high speeds of more than 25 Gb/s. Specifically, these silicon photonic ICs show good performance and have potential for low-cost and high-volume production.

One of the biggest advantages of silicon photonics is its compatibility with conventional electronic CMOS foundries. The photonics and electronics will be merged seamlessly by the CMOS process, and achieve better performance than those based on pure photonic or electronic devices. The progress made by intensive academic and industrial research on silicon photonics utilizing a mature existing CMOS process paves thway for realizing extremely low cost and large scale siliconbased OEICs, which will benefit communication, sensing, computing and nonlinear systems in the near future. To complete this step, several issues remain to be addressed:

(1) Optoelectronic integration.

As the performance of discrete devices keeps developing, the optoelectronic integration method becomes the main obstacle to optoelectronic convergence. As discussed above, frontend integration, backend integration and hybrid integration are the three main solutions, and many achievements have been made so far. However, none of them achieves a solution without a compromise of the performance between electronics and photonics. Therefore, several new technologies are emerging, such as plasmonic-based technology, Si-organic technology and Si-graphene technology, which will positively impact CMOS silicon photonics.

(2) Packaging.

To develop mature products of silicon photonics, new packaging challenges are emerging when dealing with optical coupling and thermal cooling. Optical fiber is still the most appropriate medium to transmit optical data, especially when external light source configuration is employed. Characteristics such as good thermal resistance, lowprofile geometry, compatibility with high-speed data rates and high-efficiency optical coupling should be taken into account. Therefore, advanced packaging technologies are desired to achieve low-cost mass-production assembly processes. Entrepreneurs know this very well and have devoted much effort in this area in recent years. For example, utilizing accurate mechanical guiding structures, IBM is developing a selfaligned fiber packaging technology to realize passive alignment of fiber arrays with high coupling efficiencyŒ75 .

(3) Device modeling.

Driven by economical concerns, the move to fabless design company mode becomes more and more obvious, and will benefit from existing CMOS foundries for fabrication. For silicon photonics to be competitive within this mode, standardization of the integration platform is urgently required. Therefore, the modeling of basic building blocks of CMOS silicon photonics both in optics and electronics based on the fabrication platform is a fundamental work to produce silicon photonic devices in large volumes with a high yield.

Link:

http://www.jos.ac.cn/bdtxben/ch/reader/create_pdf.aspx?file_no=15091101&year_id=2015&quarter_id=12&falg=1