Rob.

Thanks so much for that reference to the Cisco ASIC discussion which I found most interesting in that it rather confirms the garbled point I was making recently. i.e. that a monolithically Integrated POET chip built could be designed to be a programmable Application Specific Integrated Circuit (ASIC)., thus be capable of modifying processing behaviour using specific software without incurring re-spin, IC engineer speak for complete redesign and remake of a chip.

I would be interested to know to what extent Dr Taylor thinks whether Programable AISC could apply to POET. Second point is that Cisco would make excellent partners.

sula