Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Article: Fallout From Scaling

I red that one before,

The message is clear, at 5nm, another material is required, silicon won't be enough.

And note the comment about leakage of III-V and GE...

As part of the POET's platform:

Dielectric Isolation One of the POET design elements anticipated to support effective optoelectronic integration is high-quality dielectric isolation (“DI”).

DI “islands” are formed by a deep trench etch through the entire epitaxial structure into the substrate. Under each active “island” is a layer of oxide produced in the process step in which the lower mirrors are formed.

The electrical coupling path between such dielectric “islands” is through the oxide of one region, through a semi-insulating substrate, then through the oxide of another island.

This DI produces a much higher isolation than the reverse-junction and deep trench isolations of silicon

Techies, can you confirm that I got that one right?

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