here's a very interesting exchange between Semiconductor Engineering (via Ed Sperling) and Gary Patton, Chief Technology Officer at Globalfoundries.

SE: Where do you see problems at future nodes?

Patton: At the device level, we have to be able to pattern these things. We need films with the right comformality and selectivity. And we still need to strain materials. Materials innovation is at the core of a lot of this technology—straining and high-k materials, all kinds of materials to be able to etch and pattern. With self-aligned double or quadruple patterning you have to have the right films. We’re still looking at novel materials for the film—how do you grow silicon germanium or germanium or other III-V materials? That involves epitaxy. You have to be able to dope these things. If you take silicon germanium and get up to 80% or more, you start to lose boron doping. The resistivity goes up. There are alternatives like gallium.

SE: How is that working out?

Patton: We’ve done an implant process, but we really need an epi process. We’ve worked on precursors. And do you use SOI finFETsor bulk finFETs? With bulk finFETs, the problem is the junctions. There is not a lot of overlap capacitance. You have to be able to deposit source/drain dope films into very small channels. We also need to continue to engineer high-k/metal gate, and then there’s problems with contacts. How do you engineer copper? What’s beyond copper? There are materials that don’t have as good a bulk resistivity as copper, but when you start looking at how copper is starting to increase as you shrink it, due to scattering, these things are less sensitive. But that involves a lot of work involving deposition and the processing steps around it—CMP and others—to support these alternative materials.

see http://semiengineering.com/increasing-challenges-at-advanced-nodes/