Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Relationship between POET & BB is not new. Article Published on July 2013.

cp> what have they achived since 2013?

for this, simply follow their news releases.

hope the below summary helps.

GLAL,

R.

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Q3'13

switching laser progress

node size reduced from 800nm to 200nm

optical thyristor-based infrared detector array (incl. 3rd-party validation)

Q1'14

begin reduction from 200nm to 100nm

PDK prep, beginnings of San Jose presence and NASDAQ (SEC 20F filed)

re-worked UConn royalty deal from 30% to 3%

BAE validation (1st non-Lab 3rd-party fab)

Q2'14

achieved continuous-wave thyristor laser

sub-200nm

TDK complete

Synopsys TCAD developed for:

  • Complementary Hetero-structure Field-effect Transistors (HFETs)
  • Bipolar Transistors (HBTs)
  • Complementary HFET (CHFET)
  • Bipolar CHFET
  • Bipolar and Thyristor devices

- all with breakthroughs in performance and power efficiency over any existing silicon CMOS technologies that exist or are on the industry roadmap; lower BoM and assembly costs than silicon.

added new patents (worldwide registration):

  • Closed Loop Rectangular Resonators in POET & Thyristor Memory
  • Fiber Optic Coupling Array
  • Quantum Dot Lasers in POET for 1310-1550 nm Operation
  • Universal Memory Cell in POET for DRAM, SRAM and NVRAM Applications
  • IR Imaging Structures in POET based on Quantum Dot Epitaxy
  • Whispering Gallery Mode Resonators in the Planar OptoElectronic Technology; and Implementation of 1550 nm Optoelectronics in the Planar OptoElectronic Technology
  • Process for self-alignment of III-V

Q3'14

welcome Dr. Manocha (GlobalFoundries)

100nm achieved

begin transition fabrication techniques to 3rd-party commercial foundry

SEC accepts 20F

Pelligrino v2.0 sets floor at $2.4B valuation

POET PDK completed by Synopsys

work on 40nm begins (SoC target, 6" wafer size)

Q1'15

BAE begins transition from 3" wafer to 6" wafer for full production flow

welcome Mr. Blevins ("International Man of Mystery")

welcome Mr. DeBonis (TriQuint/RFMD:Qorvo)

welcome Mr. Lazovsky (IMI/AppliedMat)

Q2'15

welcome Dr. Deshmukh (AppliedMat)

welcome Dr. Venkatesan (GlobalFoundries)

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