Fairchij: Regarding what I think we can expect from POET in their efforts to shrink the node beyond 40nm. 28nm is recognized as the sweet spot for silicon. It is the most economic node in terms of Moore's Law.

I very much agree on 28 nm as being the sweet spot. Stephane Gagnon made it clear that 28 nm is indeed a target for POET "once this [40 nm] is done". On the other hand, the company must focus on priorities and it would be advisable to first reap a good deal of the fruits of the 40 and 100 nm technologies and make money, before spending more money on the next node size.

As Stephane explained the market potential is huge:

• 40 nm would be on par with or better than top-notch silicon. Only four companies in the world can manufacture 14 nm silicon, and due to high manufacturing costs 14 nm would be economic only for products with a very high volume. Much potential for customers who want very high performance at reasonable costs!
  
• 100 nm would also be highly attractive. Stephane explained how Internet of Things (IoT) would benefit from the power savings ("a ton of value"), but since 100 nm POET would be equivalent (well, sort of) to 40 nm silicon it should be clear that it is by far not only targeted at those low-end devices but to a very broad spectrum of the market.
  

So I guess the near-time focus will be on deploying 100 and 40 nm and later go down to 28 nm – IMHO, of course.