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Message: Re: POET CP as of 24 January
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Milestone Timeframe* Technical Milestone Defini4ons Q1-15 PET Founda+on PDK (Process Design Kit) targe+ng 40nm (V 1.0) Design rules and parameters library models for PET process. Devices include complementary HFET and HBT transistor and a thyristor with both op+cal and electrical opera+on. Jan-2015 3rd Party Foundry 40/100nm transfer Bring up cri+cal layers manufacturing capability in external foundry. Accelerates comple+on of development and op+miza+on learning cycles on 100 and 40nm structures. Also enables more complex test structures. Q1-15 Electrical 100nm ring oscillator Demonstra+on vehicle for high speed performance and power at 100nm process node. Reference standard to compare to Silicon CMOS. Q1-15 50 GHz VCSEL 50 GHz DWDM (dense wavelength division mul+plexing) ver+cal cavity laser device

Nowhere above does it say that 40nm will be complete in Jan. just the transfer from lab to 3rd party. I'm not sure exactly what that means??. But am I missing something and is it not the pet 40nm pdk (scheduled,for q1) that would signify completion of that node.

Nonetheless a NR next week could be due. CEO must be imminent.
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