Both the 100nm and the 40nm initiatives are for PET. The term "POET" is quite often used as a global reference to the technology as a whole and not always to simply denote the opto-electrical devices, so it can be sometimes a little confusing. It's a confusion that I think all of us have had at one time or another.

Refer to the news release of September 2, 2014 for relevent context.

http://www.poet-technologies.com/poet-technologies-announces-a-collaboration-with-third-party-foundry-to-reproduce-and-enhance-repeatability-of-the-100-nm-results-and-shrink-its-planar-electrical-technology-process-pet-to-40-nm-sca/

Purely optical applications can be fully addressed by 500nm feature sizes. The reduction of features to 100nm and 40nm are to target digital electronic applications.

These two statements are taken from comments attributed to Christopher Chu and posted on this board. I also recall similar statements in reports by members of this forum from one of the past AGM's.

Hope this helps.

Green

P.S. Question.... How small can the feature sizes be reduced for the optical portion of the POET technology?