Huge apologies to all, I have made an error in the compounding formula handling the order of computation - powers first, multiply after. I failed to remove my message in time.

Assume the speed of a silicon CMOS processor at 40 nM is x,

then the speed of a PET processor is 5x – that is it is 5 times faster.

Using a compounding formula for a 20% increase of speed for each node, then over 4 nodes and compounding the result:

Silicon = x (1 + 20%)4= x(6/5)4= 2.07x.This means you double the speed over a 4 node reduction in size.

With POET the initial speed at 40 nM is 5x and using the compounding formula for a 20% increase you get:

POET = 5x(1 + 20%)4 = 5x(6/5)4 = 10.4x.

Accordingly, if you reduce a Silicon processor through 4 nodes, you double its speed and if you do the same to a POET processor you get 10 times faster.

That means when the POET processor’s nodal size is reduced through 4 nodes it is remains than 5 times faster than a Silicon chip. Unfortuantely for Silicon it costs billions to do a one node change and is approaching its terminal ability. GaAs' reduction is much more easily achieved, and is highly likely to be cheaper as the technology is already available to reduce to current nodal sizes. Add to that the superior clock speeds, superior transistor performance, light transfer, and the substantially reduced power consumption and the integration of other functions.Remember a 40nM POET processor aims to have the same speed as the best CMOS FINFET processors on the market now.

If accurate this remains disruptive, I suggest. Don’t worry about the share price today.

David