The question is why should POET target a particular node size when by all we understand before, from the work done in the lab at ODIS , that POET chips achieves the metrics that outperform others by orders of magnitude?

One answer is that a prime advantage of POET, pehaps even its most important, is its ability to be built using current CMOS processes at fabs. It would be logical to target a size that is established and and technically stable to manufacture. by a particular fab.

Another reason is that the node size was specified by a customer.

hen in either case given POET chips innate order of magnitude performance and power benefits it will outperform those in the marlet to a stunning degree and give the impact that makes the world look up.

sulasailor