Dr Taylor actually commented on 3D IC

"POET’s view is that recently developed 3D silicon semiconductors stacking multiple chips and other silicon high-performance compound devices are very expensive to make and only offer moderate improvements over incumbent chips. One of the advantages POET presented about its process is that it can leverage existing CMOS chipmaking equipment, and it is fully compatible with existing semiconductor design and manufacturing flows. Taylor says POET’s benefits are analogous to the benefits of the first silicon integrated circuits, in that it eliminates connectors, solder joints, assembly, and multiple packaging steps while decreasing size, cost, complexity, and power."

http://www.eetimes.com/document.asp?doc_id=1322247

From may this year