Re: Re worst case senario
posted on
May 14, 2014 02:22PM
Tdk's do not describe the manufacturing process. They describe the chip and how it is implemented for a specific application. Because they are working in small lots for development and research, scaling things to larger wafers has inherent challenges. Impurities and the nature of the materials themselves. With every new technological shift there is a learning curve of how far you can take the material given and what one must do to get the maximum usable chips from a given wafer. As changes in methodologies are discovered to maximize yield, the costs associated with these differences in acquiring the chips from the wafer also change. There are many unknowns as to the final costs associated with chip manufacturing from an 8" GaA wafer. Ultimately the cost of manufacturing must be low enough for it to be economically viable. Given the performance increase with the GaA chips and the efficiencies created, the viability, I do not think, is in question. That will all be realized as they perfect the process to that level. Only then can a true cost of manufacturing be calculated, IMHO. Derek