Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: .48 eh ???

the POET fabrication processes won't necessarily have to be re-written every time, moreso they must be "re-expressed" in the format ("language") that the particular design rule checking (DRC) software requires. still hairy, but not like starting from scratch.

that POET is this far along is pretty impressive. it's a guidepost that says we're out of the prototype woods and onto the edge of serious pre-production validation.

this might be worthwhile

http://en.wikipedia.org/wiki/Design_rule_checking

and a pretty good primer...

http://www.jontse.com/courses/files/cornell/ece4740/SemiconductorFabrication.pdf

and for any uber geeks, here's a site to go lose yourself in...

http://semimd.com

GLTA,

R.

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