I can't confirm nor deny that statement, senator!

I think the argument is whether or not the DMA CPU can rely on the main CPU to function. I suppose you could argue the claim construction encompasses TPL's argument, but I don't fully understand the issue and need help from my EE (diagrams, etc.) to fully pick this up.

B. The Proper Construction of “Separate Direct Memory Access Central Processing Unit” (’890 Patent).

The parties dispute the proper construction of the term “separate direct memory access central processing unit,” as follows:

Disputed Term

Plaintiffs’ Proposed Construction

TPL’s Proposed Construction

separate direct memory access central processing unit

a separate CPU that fetches and executes instructions for performing direct memory access without using the main CPU

electrical circuit for reading and writing to memory that is separate from a main CPU

A straightforward reading of claim 1 of the ’890 patent provides for: (i) a main central processing unit (or main CPU); and (ii) a direct memory access central processing unit (or DMA CPU) that is separate from the main CPU:

A microprocessor, which comprises a main central processing unit and a separate direct memory access central processing unit in a single integrated circuit comprising said Case3:08-cv-05398-JW Document245 Filed12/23/11 microprocessor, . . . said direct memory access central processing unit providing inputs to said memory controller . . .

’890 patent, 32:44-47 (Mar Decl., Exh. K). The plain meaning of the claim language is confirmed by the ’890 specification, which describes and illustrates a main CPU and a separate DMA CPU in a single integrated circuit making up a microprocessor. ’890 patent, 6:17-20. The parties agree that “CPU” means “an electronic circuit on an integrated circuit that controls the interpretation and execution of programmed instructions.” (JCCS Ex. A, No. 7 Dkt. 305).

Given the foregoing, construction of the term should be straightforward based on ordinary meaning of the claimed structure, and TPL’s proposed construction captures the essence of such ordinary meaning. Plaintiffs, on the other hand, do not offer a structural definition of the claimed term. Instead, they restate the term with extraneous functional limitations that are not supported by the specification, in particular, prohibiting any operation of the DMA with assistance, no matter how minor, of the main CPU. Yet the claim language includes no such prohibition, nor is there support for such limitation in the specification. In contrast, TPL’s construction is correct because it describes the “DMA CPU” as properly distinct (“separate”) from the main CPU, in keeping with the claim structure, and defines the DMA CPU in accordance with the specification, as an “electrical circuit for reading and writing to memory.”

The specification includes at least two preferred embodiments of the DMA CPU. The first is shown in Figure 2, where the microprocessor 50 has a separate DMA CPU 72 with “the ability to fetch and execute instructions.” ’749 patent, 8:22-23; Mar Decl., Exh. M. “[A] second embodiment of a microprocessor in accordance with the invention,” shown in Figure 9, discloses a DRAM die with on-chip memory and a “DMA CPU” 314. Id., 4:61-62. Here, “the DMA processor 72 of the microprocessor 50 has been replaced with a more traditional DMA controller.” Id., 12:63-65 (emphasis added). This “more traditional DMA controller” is one that functions more as a traditional state machine, without the ability to fetch its own instructions that characterizes a CPU. See, e.g., id., 1:55-58, Background of the Invention (DMA controllers in conventional microprocessors “can provide routine handling of DMA requests and responses, but some processing by the main central processing unit (CPU) of the microprocessor is required.”).

The specification discloses at least two embodiments of a DMA CPU, while Plaintiffs’ construction would exclude the “traditional” “DMA CPU 314” of Figure 9.

Plaintiffs attempt to narrow the ordinary meaning of DMA by limiting it to “performing direct memory access without using the main CPU” is incorrect, as such would exclude a preferred embodiment. Indeed, even Plaintiffs’ expert, Dr. Wolfe, testified that the main CPU can initiate memory transfers.4 As this falls within the realm of “direct memory access related operations,” even Plaintiffs’ expert appears to disagree with Plaintiffs’ proposal. TPL’s construction properly captures the breadth of this term.