The examiner seems to be disregarding the fact that the disagreement on what is meant by synchonization in claim 8 is fully explained in the text of the patent. Wonder if he just doesn't understand, or is the problem with claim 8 the fact that it is not clear enough within the claim istself? Which leads to the question of whether the patent owner is allowed to make changes to claim 8 if the change is backed by information in patent text and diagrams? Opty

<The external world must be synchronized to the microprocessor 50 for operations such as video display updating and disc drive reading and writing. This synchronization is performed by the I/O interface 432, speed of which is controlled by a conventional crystal clock 434. The interface 432 processes requests for memory accesses from the microprocessor 50 and acknowledges the presence of I/O data. The microprocessor 50 fetches up to four instructions in a single memory cycle and can perform much useful work before requiring another memory access. By decoupling the variable speed of the CPU 70 from the fixed speed of the I/O interface 432, optimum performance can be achieved by each. Recoupling between the CPU 70 and the interface 432 is accomplished with handshake signals on lines 436, with data/addresses passing on bus 90, 136. >