Not sure I agree with the following.

<Our claim specifies an intermittent sync'ing of the clocks, thereby allowing the ring oscillator clock at the CPU to perform at maximum possible capacity, which an intermittent "check" to enable overall alignment (stopping the CPU from "outrunning" the capacity of other conponents/functions). >

You are making it sound like the clocks are synchronized with each other and IMHO that is not true.

<This synchronization is performed by the I/O interface 432, speed of which is controlled by a conventional crystal clock 434.>

IMHO both the CPU and outside world communicate independently with interface 432 (which is part of memory controller). The clocks are not necessarily at the same frequency at the same time. The memory access consumes too much time, which is why the 336 decouples that process from the CPU. So there is a synchronnization process, but the clocks are not in sync. Again IMHO and I'm not and EE so I may be mistaken. Opty