RE: Intel SA-1100 and 1110......GPIO26 and 27 are the core clock split

Question: What is the difference between using GPIO26 and GPIO27 to get the clock output?

Resolution: If you want a clock that is fixed in relation to the core clock, RCLK_OUT on GPIO26 should be used. RCLK_OUT is one half the core clock. The various clocks available through GPIO27 are less useful. However, you can get the 3.864 MHz oscillator output on GPIO27. The ring oscillators are not very accurate and have no relation to the core clock.

What are they there for ? Somethings there managing what? DMA....``direct memory management`` is what Shaboom and 336 are all about....the elimination of middle memory.

Question: On the SA-1110, GPIO 26 has an alternate function that outputs the internal clock/2. Can software switch between the alternate function for pin 26 and a dedicated output to use this as a clock gating feature?

Resolution: RCLK_OUT on GPIO26 began as a test function so that proper operation of the PLL could be tested. Its function was then made public so that customers could use it as an external clock. It is not specified for gated operation. That part of the device is not likely to see a lot of changes, so there is a good chance that behavior is consistent over time and changes in stepping.

Question: I want RCLK_OUT on GPIO. I have set GPDR and GAFR to 1, but I do not get RCLK_OUT on the GPIO pin.

Resolution: You have to also set the Test Unit Control Register (TUCR) bits to 0b100. This is documented in Appendix D of the Developer`s Manual.

Question: Is RCLK_OUT continuous?

Resolution: Yes, RCLK_OUT is continuous as long as the processor is running, meaning as long as it is not in sleep or idle mode.

Question: Would it be possible to use RCLK_OUT as the SDRAM clock rather than using SDCLK? Is RCLK_OUT in phase with SDCLK?

Resolution: While something like that may work, there is no guarantee of any phase relationship between RCLK_OUT and SDCLK. However, the SDCLKs are all in phase with each other. Since there is no guarantee, it is not possible to be certain of the timing relationship between RCLK_OUT and any of the SDRAM control signals generated by the SA-1110. Although it may work, Intel does not guarantee it will, or recommend attempting it