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Fujitsu Delivers ARM9E Processors for ASIC Designs Using Cadence Encounter RTL Compiler

By Market Wire

Last Update: 9/6/2006 12:01:53 PM Data provided by

SAN JOSE, CA, Sep 06, 2006 (MARKET WIRE via COMTEX) -- Cadence Design Systems, Inc. (CDNS) today announced that Fujitsu Limited successfully optimized ARM926EJ-S(TM) and ARM946E-S(TM) processors using Cadence(R) Encounter(R) RTL Compiler and the Cadence Optimization Methodology Kit. Through more than 250 tapeouts, Cadence Encounter RTL Compiler has been proved to deliver improved performance, smaller area, lower power consumption and faster design closure through place and route. The Cadence Optimization Methodology Kit for ARM(R) processors helps design teams enhance performance, power utilization, and area when designing with ARM processors and physical libraries.

``Fujitsu has provided ARM926EJ-S and ARM946E-S processors for many ASIC projects. Using Encounter RTL Compiler and the Cadence Optimization Methodology Kit for ARM processors, we are able to offer more optimized processors that meet our ASIC customers design requirements at 90 nanometers and below,`` said Satoshi Andou, general manager, Design Platform Development Division, Electronic Devices Business Unit of Fujitsu Limited. ``We have qualified and are using Encounter RTL Compiler for ASIC designs since last year and decided to use this advanced synthesis technology and kit for ARM926EJ-S and ARM946E-S processors in various combinations of memory and low-power and high-performance libraries. We were able to achieve overall improvements in power performance and area, with performance increases up to13.2 percent.``

``Through our on-going collaboration with Cadence, we continue to partner in ways that accelerate our joint customers` ability to achieve the power, performance and area targets that they require,`` said Kevin McDermott, director of CPU Product Marketing, Processors Division, ARM. ``Supporting leading-edge customers, like Fujitsu, in enabling significant results through the Cadence Optimization Methodology Kit for ARM processors validates the importance we place in partner collaboration.``

``Cadence invests in deep and broad collaboration across the design chain to deliver improved productivity and results for our mutual customers,`` said Jan Willis, senior vice president, Industry Alliances at Cadence. ``We`re delighted that this three-way collaboration, based on the Cadence kit strategy, has produced results for two of our strategic partners, Fujitsu and ARM.``

About Cadence

Cadence enables global electronic-design innovation and plays an essential role in the creation of today`s integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, printed circuit boards and systems used in consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2005 revenues of approximately $1.3 billion, and has approximately 5,100 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Cadence, the Cadence logo and Encounter are registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

ARM is registered trademark of ARM Limited. ARM926EJ-S and ARM946E-S are trademarks of ARM Limited. All other brands or product names are the property of their respective holders. ``ARM`` is used to represent ARM Holdings plc; its operating company ARM Limited; and the regional subsidiaries ARM INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; ARM Belgium N.V.; AXYS Design Automation Inc.; AXYS GmbH; ARM Embedded Technologies Pvt. Ltd.; and ARM Physical IP, Inc.

SOURCE: Cadence Design Systems, Inc.